OSN 3500 is a new-generation optical transmission system developed by Huawei. It adopts a unified switching architecture and can function as an MPLS/MPLS-TP-based packet device or a TDM device. When working with other devices of Huawei, OSN 3500 supports various networking modes, including the pure packet mode, hybrid networking (packet + TDM) mode, and pure TDM mode, achieving optimal processing for packet services and traditional SDH services. Thus, OSN 3500 efficiently transmits voice and data services over the same platform.
Version Description
The SF64 is available in the following functional versions: N1 and N4.
Table 1 describes the versions of the SF64.
| Item | Description |
|---|---|
| Functional versions | The SF64 is available in two functional versions, namely, N1 and N4. |
| Differences |
|
| Substitution |
The N4SF64 supports the board version replacement function to substitute for the N1SF64.
|
Version Mapping
| Board | Start Versiona |
|---|---|
| N1SF64 |
V100R006C01
|
| N4SF64 | V100R010C00 |
| a: If there is replacement relationship between boards, the start version of the replaced board prevails. | |
Board Updates
This section describes the hardware updates in V200R013C30 and later versions as well as the reasons for the updates. Any product versions that are not listed in the document means that they have no hardware updates.
Application
The SF64 is a line board. The SF64 can be used on the OptiX OSN equipment series to transmit and receive STM-64 optical signals. The SF64 can achieve ultra-long distance transmission when working with the BPA and DCU board.
The SF64 can be interconnected with the wavelength division multiplexing (WDM) equipment.
Functions and Features
The SF64 receives and transmits 1xSTM-64 optical signals and processes overhead bytes.
Table 1 describes the functions and features of the SF64.
Working Principle and Signal Flow
The SF64 consists of the O/E converting module, MUX/DEMUX module, FEC module, SDH overhead processing module, logic and control module, and power module.
Figure 1 shows the functional block diagram of the SF64.
Figure 1 Functional block diagram of the SF64
| PLL: phase-locked loop | SPI: SDH physical interface | SDH: synchronous digital hierarchy |
| RST: regenerator section termination | MST: multiplex section termination | MSA: multiplex section adaptation |
| HPT: higher order path termination | - | - |
O/E Converting Module
- Converts the received optical signals into electrical signals, in the receive direction.
- Converts the electrical signals into SDH optical signals, and then sends the SDH optical signals to fibers for transmission, in the transmit direction.
- The SPI detects the R_LOS alarm and provides the laser shut down function.
MUX/DEMUX Module
- In the receive direction, the DEMUX part demultiplexes the high rate electrical signals into multiple parallel electrical signals, and recovers the clock signal at the same time.
- In the transmit direction, the MUX part multiplexes the parallel electrical signals received from the FEC module into high rate electrical signals.
FEC Module
- In the upstream direction, the reverse process is performed. The FEC encoding and decoding module receives the 16 x 669 Mbit/s signals from the DEMUX module. After frame searching, FEC encoding, data packets encapsulation, and scrambling in the FEC module, the 16 x 622 Mbit/s signals are recovered and then transmitted to the SDH overhead processing module. The frame format of the 16 x 669 Mbit/s signals complies with ITU G.709.
- In the downstream direction, the FEC encoding and decoding module receives 16 x 622 Mbit/s signals, which are sent by the SDH overhead processing module. After frame searching, FEC encoding, data packet encapsulation, and scrambling, the 16 x 622 Mbit/s signals are converted into 16 x 669 Mbit/s signals and then transmitted to the MUX module.
- The FEC processing module is connected to the logic and control module through a CPU bus. The CPU controls the working modes of the FEC module by configuring the internal register. The working mode can be the regenerator mode, namely, REG mode. The CPU can monitor the performance through the internal register.
SDH Overhead Processing Module
This module includes the RST, MST, MSA, and HPT sub-modules. This module provides the inloop and outloop functions.
- RST sub-module
- In the receive direction, the RST sub-module terminates the RSOH. That is, the RST sub-module detects the frame alignment bytes (A1 and A2), descrambles all the bytes except the first line of the RSOH, restores and checks the J0 byte, and checks the B1 byte.
- In the transmit direction, the RST sub-module generates the RSOH. That is, the RST sub-module writes bytes such as A1, A2, and J0, calculates and writes the B1 byte, and scrambles all the bytes except the first line of the RSOH.
- MST sub-module
- In the receive direction, the MST sub-module terminates the multiplex section overhead (MSOH). That is, the MST sub-module detects K2 bytes, and upon errors, generates MS_AIS or MS_RDI alarms; it also verifies B2 bytes, and upon errors, generates B2_SD or B2_EXC alarms and sends MS_REI signals to its opposite end.
- In the transmit direction, the MST sub-module generates the MSOH. That is, the MST sub-module writes bytes such as E2, D4-D12, K1, K2, S1, and M1, and calculates and writes the B2 byte.
- MSA sub-module
- In the receive direction, the MSA sub-module de-interleaves the AUG, divides an AUG into N AU-4s, detects the AU_LOP alarm and the AU_AIS alarm, and performs pointer justifications.
- In the transmit direction, the MSA sub-module assembles the AUG and generates the AU-4. N AU-4s are multiplexed into an AUG through byte interleaving.
- HPT sub-module
- In the receive direction, the HPT sub-module terminates the path overhead (POH). That is, the HPT sub-module verifies B3 bytes, and upon errors, sends HP_REI signals to its opposite end; it also detects J1 and C2 bytes, and upon errors, generates HP_TIM, HP_SLM, or HP_UNEQ (if VC-4 paths are unloaded) alarms.
- In the transmit direction, the HPT sub-module generates the POH. That is, the HPT sub-module writes bytes such as J1 and C2, and calculates and writes the B3 byte.
Logic and Control Module
- Manages and configures the other modules of the board.
- Performs inter-board communication through the internal Ethernet interface.
- Traces the clock signal from the active and standby cross-connect units.
- Controls the laser.
- Passes the orderwire and ECC bytes through an ADM that consists of two paired slots when the GSCC is not in position.
- Selects the clock signal and frame header signal from the active and standby cross-connect units.
- Controls the indicators on the board.
Power Module
It converts the -48 V/-60 V power supply into the DC voltages that the modules of the board require.
Front Panel
The front panel of the SF64 has indicators, interfaces, a bar code, and a laser safety class label.
Diagram of the Front Panel
Figure 1 shows the appearance of the front panel of the N1SF64.
Figure 2 shows the appearance of the front panel of the N4SF64.
Indicators
The front panel of the board has the following indicators:
- Board hardware status indicator (STAT) - two colors (red and green)
- Service activation status indicator (ACT) - one color (green)
- Board software status indicator (PROG) - two colors (red and green)
- Service alarm indicator (SRV) - three colors (red, green, and yellow)
For the meanings of the status of the indicators, see Indicators.
Valid Slots
The SF64 must be installed in a valid slot in the subrack. Otherwise, the SF64 fails to work normally.
The slots valid for the SF64 are as follows:
- The N1SF64 can be installed in slots 7, 8, 11, and 12.
- The N4SF64 can be installed in slots 5-6, 7-8, 11-12, and 13-14.
Feature Code
The number code that follows the board name in the bar code is the feature code of the board. The feature code of the SF64 indicates the type of optical interface.
Table 1 provides the relationship between the feature code of the SF64 and the type of optical interface.
Technical Specifications of the SF64
The technical specifications of the SF64 include the parameters specified for optical interfaces, laser safety class, mechanical specifications, and power consumption.
Parameters Specified for Interfaces
Table 1 lists the parameters specified for the optical interfaces of the SF64, Specifications of the colored optical interfaces comply with the ITU-T G.692.
Laser Safety Class
The safety class of the laser on the board is Class 1. The maximum launched optical power of the optical interfaces is less than 10 dBm (10 mW).
Mechanical Specifications
The mechanical specifications of the SF64 are as follows:
- Dimensions (mm): 25.4 (W) x 220 (D) x 254.1 (H)
- Weight of the N1SF64 (kg): 1.1
- Weight of the N4SF64 (kg): 1.2
Power Consumption
- At room temperature (25°C), the maximum power consumption of the N1SF64 is 33 W.
- At room temperature (25°C), the maximum power consumption of the N4SF64 is 26 W.
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